电子工程专辑

如何高效入手STM32H7？整体把控一下框架

初学STM32H7一定要优先整体把控芯片的框架，不要急于了解单个外设的功能。 学习一款新的芯片，优先掌握系统框架是比较重要的，建议逐渐养成这种学习习惯，然后各个击破即可。 本章节提供了多张STM32H7的框图，这些框图都非常具有代表性。很多时候记忆知识 ...
Design-Reuse

Comparing AMBA AHB to AXI Bus using System Modeling

Embedded system designers have a choice of using a shared or point-to-point bus in their designs. Typically, an embedded design will have a general purpose processor, cache, SDRAM, DMA port, and ...
电子工程专辑

VMM验证方法在AXI总线系统中的实现

芯片验证越来越像是软件而不是硬件工作，这点已逐渐成为业界的共识。本文以软件工程的视角切入，分析中科院计算所某片上系统(SoC)项目的验证平台，同时也介绍当前较为流行的验证方法，即以专门的验证语言结合商用的验证模型，快速建立测试平台(Test ...
Design-Reuse

PLDA Announces XpressRICH4-AXI PCIe 4.0 IP, Providing a High Performance and Reliable AXI ...

The newest addition to PLDA?s extensive line of advanced PCIe products provides the highest level of PCIe-to-AXI integration, preventing AXI deadlock with ordering rules management, while delivering ...
EDN

Connecting Custom Peripherals to AXI Using a BRAM Interface for FPGA Design

In this column, we briefly introduce AXI, we examine why FPGA designers would use AXI, and we present some of the pros and cons associated with using AXI The Advanced eXtensible Interface, or AXI, is ...
EDN

Self-timed interconnect solution supports AXI bus protocol

SAN FRANCISCO — EDA and intellectual property (IP) startup Silistix Ltd. has added support for the on-chip AMBA AXI bus protocol to the company's synthesized self-timed interconnect technology, ...
Electronic Design

Understanding FPGA Processor Interconnects

This file type includes high resolution graphics and schematics when applicable. FPGAs are wonderful tools. They consist of a collection of logic cells called lookup tables (LUTs) surrounded by an ...
Semiconductor Engineering

Locking When Emulating Xtensa LX Multi-Core On A Xilinx FPGA

Today’s high-performance computing systems often require the designer to instantiate multiple CPU or DSP cores in their subsystem. However, the performance gained by using multiple CPUs comes with ...